Top-down and bottom-up approaches towards silicon nanoelectronics

The performance of silicon-based VLSI circuits has steadily been improved by scaling down device dimensions, and a nearly exponential growth of microelectronics capabilities has been achieved. However, maintaining this top-down miniaturization trend is getting exceedingly hard due to fundamental physical and technological limitations as well as of the economical limitation. Nonconventional bottom-up approach has attracted much attention along with recent progress of techniques for fabricating size-controlled silicon nanodots (SiNDs) and nanowires (SiNWs). Individual SiNDs and SiNWs maintain superior electron transport properties, and high-performance nanoelectronic devices may be fabricated by integrating these Si nanostructures as a building block. In addition, the Si-based bottom-up approach may lead to highperformance and large-area electronics as the SiNDs and SiNWs can be assembled both on Si and non-Si substrates such as glass and plastic. Moreover, zeroand one-dimensional nature of electronic states in the individual SiNDs and SiNWs realizes new electronic and photonic properties which are not achieved with bulk silicon. Combining the bottom-up approach with the conventional top-down Si technologies enables us to explore silicon nano-, microand macro-electronics on the common technical footing. This paper presents a brief review of our recent work investigating a novel bottom-up approach to realize silicon based nanoelectronics. We discuss fabrication technique, electronic properties and device applications of silicon nanodots as a building block for nanoscale silicon devices.